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product brief february 1998 TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer features n multiplexes three sts-1 signals into a sonet sts-3 signal. n multiplexes three au-3 signals into an sdh stm-1 (au-4) signal via a tug-3 construction. n demultiplexes three sts-1 signals from a sonet sts-3 signal. n demultiplexes three au-3 signals from an sdh stm-1 (au-4) signal via a tug-3 deconstruction. n high-speed microprocessor interface con?urable to operate with most commercial microprocessors. n detects sts-3/stm-1 (au-4) loss-of-signal (los) conditions. n detects sts-3/stm-1 (au-4) out-of-frame and loss-of-frame (oof/lof) conditions. n provides an 8-bit bus interface at the sts-1/au-3 rate. n provides a bit serial, nibble-wide, or byte-wide interface at sts-3/stm-1 (au-4) rate. n provides sts-3/stm-1 (au-4) selectable scram- bler/descrambler functions and b1/b2/b3 genera- tion/detection. n accepts bit rate, nibble rate, or byte rate high- speed clocks (155.52 mhz, 38.88 mhz, or 19.44 mhz, respectively). n ?0 c to +85 c temperature range. n 208-pin shrink quad ?t pack (sqfp) package, or 208-pin plastic ball grid array (pbga). n 3.3 v operation with 5 v tolerant digital i/o. applications n sonet/sdh line termination equipment n sdh path origination and termination equipment n sonet/sdh add/drop multiplexers n sonet/sdh cross connects n sonet/sdh test equipment description the TMUX03155 sts-3/stm-1 (au-4) multiplexer device provides two modes of operation: sts-3 and au-4 modes. in sts-3 mode, the TMUX03155 device provides all of the functions necessary to mul- tiplex and demultiplex up to three sts-1 signals to/ from a sonet sts-3 signal. in au-4 mode, the TMUX03155 provides the functionality to multiplex and demultiplex up to three au-3 signals to/from an stm-1 (au-4) signal. on the sts-3/stm-1 (au-4) side, the device can be con?ured for either a 1-bit serial data interface, a 4-bit parallel (nibble-wide) data interface, or an 8-bit parallel (byte-wide) data interface. this allows the device to drive an oc3 opti- cal signal directly or to allow for modular growth in terminal or add/drop applications. on the sts-1/ au-3 side, the TMUX03155 device provides a bus mode that can communicate with up to three sts-1/ au-3 devices at 19.44 mbits/s. the TMUX03155 is designed to interface with the lucent technologies microelectronics group tmpr28051 device, or equivalent, providing complete mapping/unmapping from/to an sts-3/stm-1 (au-4) signal for up to 84 ds1 or 63 e1 signals. automatic receive monitoring functions can be con- ?ured to provide an interrupt to the control system, or the device can be operated in a polled mode. built-in loopback at both the sts-1/au-3 and sts-3/ stm-1 (au-4) interfaces provides maximum ?xibility for use in a number of sonet/sdh products includ- ing path termination multiplexers, add/drop multiplex- ers, and digital cross connects. a high-speed microprocessor interface and full user programmability on sts-1/au-3 to sts-3/stm-1 (au-4) slot insertion and drop provide maximum ?x- ibility for i/o con?uration.
product brief TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer february 1998 2 lucent technologies inc. block diagram in the transmit direction, the device outputs a clock and sync and accepts bused data[7:0] and a parity signal from up to three devices. the device outputs one data bundle at the sts-3/stm-1 (au-4) rate (clock, sync, data[7:0], and parity bit). a local clock and optional frame sync signal are needed for operation of the device. a transport overhead access channel (toac) is provided to allow overwriting of the transport overhead bytes in the output sts-3/stm-1 (au-4) frame. in the receive direction, the device accepts one sts-3/stm-1 (au-4) bundle (clock, data, parity), and accepts a loss-of-signal indication from an external source. the device outputs three sts-1/au-3 signals over a bus interface (clock, data, j0 time, parity). the sts-3/stm-1 (au-4) input clock is used to clock this direction. a transport over- head access channel is provided for additional external monitoring of the incoming transport overhead of the sts- 3/stm-1 (au-4) frame. a pointer interpreter is provided to monitor path functions. the device has loopback capabilities at the sts-1/au-3 and sts-3/stm-1 (au-4) interfaces. an 8-bit microproces- sor interface, jtag control logic, and in-circuit test capabilities are provided. 5-5294(f).ar.4 figure 1. TMUX03155 block diagram toac drop 3:1 mux logic spe generate 1:3 demux logic loopback select logic transport overhead loss of clock ber monitor #1r #2r #3r #1t, #2t, #3t #1r, #2r, #3r select/ logic multi- cast overhead monitor toac insert microprocessor local clock generation transmit direction receive direction s#1t s#2t s#3t tlsclko #1t #2t #3t overhead monitor interface overhead monitor bus control drop select/ logic loopback select logic add tlsspeo, tlspari tlsdata[7:0]i rlsclko bus control rlsj0timeo rlsparo rlsdata[7:0]o ttoacclko (5.184 mh z ), pointer interpreter and path monitors los framer rhslosexti ttoacsynco (8 kh z ), ttoacdatai (5.184 mbits/s) tlsv1timeo (19.44 mhz) (19.44 mhz) rtoacclko (5.184 mh z ), rtoacsynco (8 kh z ), rtoacdatao (5.184 mbits/s) thssclkot/c (155.52 mh z ), thsssyncot/c (8 kh z ), thssdataot/c (155.52 mbits/s) or rhssclkit/c (155.52 mh z ) rhssdatait/c (155.52 mbits/s) or multi- cast tlsc1j1v1timeo, thsclko (38.88 or 19.44 mhz), thssynco (8 kh z ), thsdata[7:0]o (38.88 or 19.44 mbits/s), rhsclki (38.88 or 19.44 mhz), rhsdata[7:0]i (38.88 or 19.44 mbits/s), thsparo (38.88 or 19.44 mbits/s) rhspari (38.88 or 19.44 mbits/s)
product brief february 1998 TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer 3 lucent technologies inc. mode control signals the device is controlled by four control signals: t/rsonet_sdh and t/rsts3_au4 signals. these signals control: n the type of input signal to expect (low-speed (ls) side?ts-1/au-3), n the expected high-speed (hs) input/output signal format?ts-3/stm-1 (au-4), and n the default byte value in the outgoing hs frame. these provisioning signals are summarized in table 1 and table 2. transmit direction overview the following major functions are performed in the transmit direction: sts-1/au-3 bus mode input retiming, input select control, sts-1/au-3 inputs, out-of-frame (oof) and loss-of-frame (lof) monitoring, descramble enable/disable, monitor b1 and b2 errors, h4 multiframe and pointer monitor (au-4 mode only), sts-3 generate, stm-1 (au-4) frame generation (au-4 mode), transport overhead access channel (toac) insert, sts-3/stm-1 (au-4) scramble enable, sts-3/stm-1 (au-4) loopback control, and sts-3/stm-1 (au-4) output interface. sts-1/au-3 bus mode input retiming the bus mode provides a single byte-wide bus and parity bit that is shared with up to three devices at 19.44 mbits/s. the device will source a clock (19.44 mhz), synchronous payload envelope (spe) indicator, j0j1v1 indicator, and v1 time indicator signals toward the downstream devices. these signals guarantee frame alignment between all three sts-1/au-3 inputs and h4 byte multiframe values (au-4 mode). input select control this function determines which signals are multiplexed to form the sts-3/stm-1 (au-4) signal. loopback (sts-1/ au-3-r to sts-1/au-3-t), input shuf?, and multicast operations are possible. the selected sts-1/au-3 inputs are labeled s#1t, s#2t, and s#3t in figure 1. when any one of the inputs is in loopback mode, all other inputs are timed off the receive high-speed clock. table 1. transmit mode control signals tsts3_au4 tsonet_sdh description 0 = sts-3 0 = sonet three sts-1 inputs multiplexed to an sts-3 output. 1 = au-4 0 = sonet three au-3 signals multiplexed to an stm-1 (au-4) signal. 0 = sts-3 1 = sdh three sts-1 inputs multiplexed to an sts-3 output. 1 = au-4 1 = sdh three au-3 signals multiplexed to an stm-1 (au-4) signal. table 2. receive mode control rsts3_au4 rsonet_sdh description 0 = sts-3 0 = sonet one sts-3 input demultiplexed to three sts-1 outputs. 1 = au-4 0 = sonet one stm-1 (au-4) input demultiplexed to three au-3 outputs. 0 = sts-3 1 = sdh one sts-3 input demultiplexed to three sts-1 outputs. 1 = au-4 1 = sdh one stm-1 (au-4) input demultiplexed to three au-3 outputs.
product brief TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer february 1998 4 lucent technologies inc. transmit direction overview (continued) sts-1/au-3 inputs the sonet/sdh sts-1/au-3 frame is comprised of 9 rows x 90 columns that repeat at an 8 khz rate. each column is 1-byte wide. the frame contains three col- umns of transport overhead, one column of path over- head, and 86 columns of payload. for column byte de?itions, see table 3 below. the 27 bytes of transport overhead from each sts-1/ au-3 input must be aligned* (a1-1, a1-2, a1-3 must all be coincident from all three sts-1/au-3 inputs) and are allocated as shown below . * can be provided by the tmpr28051 mapper device. ? monitored in sts-1 mode. monitored in au-4 mode. note: x = don? care (payload). the path overhead (poh) can start anywhere within the spe and cannot be accessed in the sts-3 mode. in the au-4 mode, the pointer is ?ed at 522\d; there- fore, the j1 byte will always be in row 1, column 4. the h4 byte is the only valid byte in the poh and all other bytes are ignored. out-of-frame (oof) and loss-of-frame (lof) monitoring the device monitors for out-of-frame (oof) and loss- of-frame (lof) states on each selected sts-1/au-3 input. each input will be considered out-of-frame until two successive framing patterns (0xf628) separated in time by 125 m s occur without framing byte errors. each selected sts-1/au-3 input will be considered in frame until ?e (sdh)/ four (sonet) successive frames sep- arated in time by 125 m s occur with errored framing pat- terns. the device will be considered in the lof state when an oof condition persists for 24 consecutive frames (3 ms), or clear when the oof condition is inac- tive for 24 consecutive frames (3 ms) with the correct framing patterns spaced 125 m s apart. descramble enable/disable each selected sts-1/au-3 input can be descrambled according to the frame synchronous descrambling sequence 1 + x 6 + x 7 . writing a logic 1 to the appropri- ate bit causes the selected sts-1/au-3 signal to be descrambled. monitor b1 and b2 errors the device veri?s b1 and b2 bit interleaved parity (bip) values on each selected sts-1/au-3 input. the device will count bip errors or block errors under soft- ware control. h4 multiframe and pointer monitor (au-4 mode only) in this mode, all three input signals are required to have pointer values (h1, h2) with the same ?ed value of 522\d. this ensures the j1 byte starts in row 1, column 4. the h4[1:0] multiframe bits must be the same from all inputs and equal to the internally expected value. this is required because the output stm-1 (au-4) sig- nal only has one h4 byte. the device will synchronize its h4 internal expected value to a 1 after detecting an embedded 2 khz sync in the local frame sync signal. table 3. expected sts-1/au-3 input frame format transport overhead payload col 1 col 2 col 3 col 4 col 5?0 row 1 a1 ? a2 ? j0 j1 x row 2 b1 ? e1 f1 b3 x row 3d1d2d3c2 x row 4 h1 h2 h3 g1 x row 5 b2 ? k1 k2 f2 x row 6 d4 d5 d6 h4 x row 7 d7 d8 d9 z3 x row 8 d10 d11 d12 z4 x row 9 s1 m0 e2 z5 x
product brief february 1998 TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer 5 lucent technologies inc. transmit direction overview (continued) sts-3 generate in sts-3 mode, the device will create the overhead according to table 4 below. the poh byte locations are not ?ed and cannot be accessed. * access through transmit toac. table 4. sts-3 output overhead format sts-3 overhead col. 1 col. 2 col. 3 col. 4 col. 5 col. 6 col. 7 col. 8 col. 9 col. 10?70 row 1 a1-1 a1-2 a1-3 a2-1 a2-2 a2-3 j0 z0-2 z0-3 payload row 2 b1 b1-2* b1-3* e1* e1-2* e1-3* f1* f1-2* f1-3* row 3 d1* d1-2* d1-3* d2* d2-2* d2-3* d3* d3-2* d3-3* row 4 h1-1 h1-2 h1-3 h2-1 h2-2 h2-3 h3-1 h3-2 h3-3 row 5 b2-1 b2-2 b2-3 k1 k1-2* k1-3* k2 k2-2* k2-3* row 6 d4* d4-2* d4-3* d5* d5-2* d5-3* d6* d6-2* d6-3* row 7 d7* d7-2* d7-3* d8* d8-2* d8-3* d9* d9-2* d9-3* row 8 d10* d10-2* d10-3* d11* d11-2* d11-3* d12* d12-2* d12-3* row 9 s1* z1-2* z1-3* z2-1* z2-2* m1 e2* e2-2* e2-3* note: bold type within the table is not de?ed in the standard and is labeled here for clarity. the following values are assigned to the transmitted overhead bytes: a1?1110110 (0xf6) a2?0101000 (0x28) j0?rogrammable z0-2?rogrammable z0-3?rogrammable b1?ariable value (bip-8 parity) f1?rogrammable h1-1, 2, 3?assed through from respective sts-1 h2-1, 2, 3?assed through from respective sts-1 h3-1, 2, 3?assed through from respective sts-1 b2-1, 2, 3?ariable value (bip-24) k1?rogrammable k2?rogrammable s1?rogrammable m1?ariable value (section febe?umber of b2 errors) all bytes not speci?d above either: (1) are set to the ?ed stuff value (0x00 (sonet)) or (2) are toac value-inserted or (3) have passed through from the selected sts-1 input, all under software control.
product brief TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer february 1998 6 lucent technologies inc. transmit direction overview (continued) stm-1 (au-4) frame generation (au-4 mode) in stm-1 mode, the device will create the overhead according to the following table. the path overhead bytes are created in this mode. the three au-3 inputs are converted to tug-3 format and inserted into a vc-4 that is multi- plexed into an au-4. * access through transmit toac. table 5. stm-1 (au-4) output overhead format stm-1 (au-4) overhead au-4 payload col.1 col. 2 col. 3 col. 4 col. 5 col. 6 col. 7 col. 8 col. 9 poh 10 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 22 270 row 1 a1-1 a1-2 a1-3 a2-1 a2-2 a2-3 j0 z0-2 z0-3 j1 f i x e d s t u f f f i x e d s t u f f n p i n p i n p i f i x e d s t u f f f i x e d s t u f f f i x e d s t u f f t u g - 3 a t u g - 3 b t u g - 3 c row 2 b1 b1-2* b1-3* e1* e1-2* e1-3* f1* f1-2* f1-3* b3 row 3 d1* d1-2* d1-3* d2* d2-2* d2-3* d3* d3-2* d3-3* c2 row 4 h1-1 y y h2-1 1* 1* h3-1 h3-2 h3-3 g1 s t u f f s t u f f s t u f f row 5 b2-1 b2-2 b2-3 k1 k1-2* k1-3* k2 k2-2* k2-3* f2 row 6 d4* d4-2* d4-3* d5* d5-2* d5-3* d6* d6-2* d6-3* h4 row 7 d7* d7-2* d7-3* d8* d8-2* d8-3* d9* d9-2* d9-3* z3 row 8 d10* d10-2* d10-3* d11* d11-2* d11-3* d12* d12-2* d12-3* z4 row 9 s1* z1-2* z1-3* z2-1* z2-2* m1 e2* e2-2* e2-3* z5 note: bold type within the table is not de?ed in the standard and is labeled here for clarity. the following values are assigned to the transmitted overhead bytes: a1?1110110 (0xf6) a2?0101000 (0x28) j0?rogrammable z0-2?rogrammable z0-3?rogrammable b1?ariable value (bip-8 parity) f1?rogrammable h1-1?1101010 h2-1?0001010 (pointer value of 522\d) y?0011011 (ndf, ss, ptr) - concatenation indication 1?ll ones pattern h3-1, 2, 3?efault byte value (0xff) b2-1, 2, 3?ariable value bip-24 k1?rogrammable k2?rogrammable s1?rogrammable m1?ariable value (section febe?umber of b2 errors) path bytes j1?4-byte programmable sequence b3?ariable value bip-8 c2?rogrammable g1[7:4]?eicnt (b3 errors from receive side) g1[3]?di indication g1[2:0]?efault value f2?rogrammable h4[1:0]?osition indicator (multiframe value (00/b to 11/b)) z3?rogrammable z4?efault value z5?rogrammable all bytes not speci?d above are either (1) set to the ?ed stuff value 0xff (sdh), or (2) toac value inserted, or (3) passed through from the selected au-3 input, all under user control. transmit direction overview (continued) transport overhead access channel (toac) insert the device will allow the insertion of overhead data from the transmit toac under user control.
product brief february 1998 TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer 7 lucent technologies inc. sts-3/stm-1 (au-4) scramble enable scrambling of the sts-3/stm-1 (au-4) signal is provi- sionable. a frame synchronous scrambling sequence 1 + x 6 + x 7 is used. sts-3/stm-1 (au-4) b1, b2, and b3 bip generation the device will generate a b1-bip-8, b2-bip-24, and a b3-bip-8 (au-4 mode only) on the output signal. each bip calculator can be programmed to insert an inverted bip value. sts-3/stm-1 (au-4) loopback control the output sts-3/stm-1 (au-4) signal can be replaced by the receive sts-3/stm-1 (au-4) signal under software control. sts-3/stm-1 (au-4) output interface the transmit sts-3/stm-1 (au-4) output can be serial at 155.52 mbits/s, nibble at 38.88 mbits/s, or byte paral- lel at 19.44 mbits/s. the data is clocked out of the device on the rising edge of the clock. this clock can be inverted before leaving the device. when provi- sioned in the parallel or nibble mode, an even or odd parity bit is generated per transfer. the output clock, sync, and data signals can be placed in a high-impedance state under user control. unused outputs in serial and nibble mode will be placed in a high-impedance state automatically by the device. receive direction overview the following functions are performed in the receive direction: input retime, sts-3/stm-1 (au-4) framing, loss of signal, loopback select logic, sts-3/stm-1 (au-4) frame synchronous descrambling, toac drop, b1, b2, and b3 checking, monitoring functions, pointer interpretation, data demultiplex and conver- sion, sts-1/au-3 output byte control, b1 and b2 gen- erate, sts-1/au-3 output scramble, and output selection logic. input retime the device accepts either a serial 155.52 mhz-mbits/s, nibble 38.88 mhz-mbits/s, or byte parallel 19.44 mhz-mbits/s clock-data sts-3/stm-1 (au-4) input. the user can select on which edge of the clock to retime the data. if in nibble or parallel mode, an odd/ even parity bit is veri?d per transfer; otherwise, this indicator is disabled. sts-3/stm-1 (au-4) framing the device will frame on the input sts-3/stm-1 (au-4) signal. the state of the framer as well as any changes to this state will be reported. framing algorithm the 32-bit (a1-2, a1-3, a2-1, a2-2) framing pattern will be used in the frame detection. the device will be con- sidered out of frame until two successive framing pat- terns separated in time by 125 m s occur without framing byte errors. the device will be considered in frame until ?e (sdh)/ four (sonet) successive frames separated in time by 125 m s occur with errored framing patterns. if the framer transitions to the out-of-frame state, the framer will remain synchronized to the last known frame boundary or the latest detected unerrored framing pat- tern.
product brief TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer february 1998 8 lucent technologies inc. receive direction overview (continued) sts-3/stm-1 (au-4) framing (continued) the device will be considered in the loss-of-frame state (lof) when an oof condition persists for 24 consecu- tive frames (3 ms). the device will transition out of the lof state after receiving 24 consecutive frames with the correct framing patterns spaced 125 m s apart and the oof condition is clear. loss of signal before data is descrambled, the device will detect a loss-of-signal condition by monitoring a unique input signal pin or detecting a continuous all-zeros/ones pat- tern. the device will report this condition to the micro- processor interface. loopback select logic the device can be con?ured to loopback the transmit sts-3/stm-1 (au-4) or accept the local sts-3/stm-1 (au-4) signal. sts-3/stm-1 (au-4) frame synchronous descrambling the device will descramble the received sonet/sdh data (minus the ?st row of soh) according to the frame synchronous descrambling polynomial; speci?ally, f(x) = 1 + x 6 + x 7 . frame descrambling can be disabled under software control. toac drop this channel drops all of the transport overhead bytes from the sts-3/stm-1 (au-4) signal. b1, b2, and b3 checking the device will monitor the incoming b1, b2, and b3 values for errors. these counters will either count bit or block errors. monitoring functions the following transport overhead and path overhead bytes are monitored for failures or changes in states ((j0, z0-2, z0-3, f1, k1k2 (aps bytes), s1, m1), (j1,c2, g1, f2, h4, z3, z5)). the bit error rate of the incoming sts-3/stm-1 (au-4) signal is calculated to create signal fail and signal degrade indicators. pointer interpretation the device will evaluate the current pointer state for the normal state, path ais (pais) state, or loss of pointer (lop) conditions, as well as pointer increments and decrements. this state machine implements the pointer interpretation algorithm described in ets 300 417-1-1: january 1996 - annex b. data demultiplex and conversion the device will demultiplex the sts-3/stm-1 (au-4) signal into three sts-1/au-3 signals, respectively. in the au-4 mode, a conversion between the au-4 pay- load format and the au-3 payload format is performed; this requires the location of the j1 byte to be known. in the sts-3 mode, the high-speed signal is byte-demulti- plexed and no format conversion occurs. sts-1/au-3 output byte control the output overhead bytes are controlled in one of four ways: 1. errors can be inserted, 2. values from the high-speed sts-3/stm-1 signal can be copied or set to the byte default, 3. values can be inserted under software control, or 4. values can be inserted under hardware control.
product brief february 1998 TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer 9 lucent technologies inc. receive direction overview (continued) sts-1/au-3 output byte control (continued) table 6 shows the speci? control allowed for each overhead byte. 1. error insert. 2. input pass or default value. 3. software overwrite. 4. copy of the selected byte from the incoming stm-1 (au-4) frame; otherwise, the bytes pass without being changed (poh can start anywhere within the spe). 5. hardware overwrite. note: x = don? care (payload). b1 and b2 generate the b1 and b2 values of the outgoing sts-1/au-3 signal are calculated. an error byte can also be forced into the b1 and b2 values on a per sts-1/au-3 basis. sts-1/au-3 output scramble the device allows scrambling of the output signals on a per-output basis. output selection logic the demultiplexed signals can be routed to any output port or can be multicast to more than one port under soft- ware control. output data formatter the device outputs one clock at 19.44 mhz, one j0 time signal, an 8-bit data bus, and an odd/even parity bit. the bus can be shared with up to three other devices. each device determines its time slot using the j0 time signal. the byte coincident with the j0 time sync signal is always available for device number 1; subsequent bytes are available for device 2, device 3, and then device 1 again. the sense of the 19.44 mhz output clock can be inverted under user control. table 6. sts-1/au-3 format and overhead control summary transport overhead payload col. 1 col. 2 col. 3 col. 4 col. 5?0 row 1 a1 a2 1 j0 3 j1 4 x row 2 b1 1 e1 2 f1 2, 3 b3 x row 3 d1 2 d2 2 d3 2 c2 4 x row 4 h1 1, 4 h2 1, 4 h3 4 g1 4 x row 5 b2 1 k1 1, 3 k2 1, 3 f2 4 x row 6 d4 2 d5 2 d6 2 h4 4 x row 7 d7 2 d8 2 d9 2 z3 4 x row 8 d10 2 d11 2 d12 2 z4 x row 9 s1 2 m0 1, 5 e2 2 z5 4 x
product brief TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer february 1998 10 lucent technologies inc. typical uses section and line termination multiplex using the device without internal loopbacks results in a multiplex/demultiplex operation. 5-5296(f)r.10 figure 2. line termination multiplex sts-3/stm-1 (au-4) out sts-1/au-3 out sts-3/stm-1 (au-4) in control signals transmit direction receive direction toac drop 3:1 mux logic spe generate 1:3 demux logic framer overhead transport/path monitor select/ logic multi- cast overhead monitor toac insert microprocessor local clock generation bus overhead monitor interface overhead monitor drop select add control sts-1/au-3 in control signals bus control logic
product brief february 1998 TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer 11 lucent technologies inc. typical uses (continued) add/drop multiplex using the device with sts-1/au-3 internal loopbacks results in an add/drop multiplex. 5-5297(f)r.7 figure 3. add/drop multiplex digital cross connect using the device with sts-3 internal loopback results in a digital cross connect. 5-5298(f)r.3 figure 4. digital cross connect 3:1 mux logic overhead generate 1:3 demux logic framer transport monitor sts-3/stm-1 (au-4) in sts-3/stm-1 (au-4) out sts-1/au-3 in sts-1/au-3 out select/ multi- cast logic drop select receive direction transmit direction logic drop select logic add bus control logic 3:1 mux logic overhead generate 1:3 demux logic overhead monitor sts-1/au-3 #1 in sts-1/au-3 #2 in sts-1/au-3 #3 in framer transport monitor drop select logic sts-1/au-3 #1 out sts-1/au-3 #2 out sts-1/au-3 #3 out overhead monitor overhead monitor
product brief TMUX03155 sts-3/stm-1 (au-4) multiplexer/demultiplexer february 1998 lucent technologies inc. reserves the right to make changes to the product(s) or information contained herein without notice. no liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such product(s) or information. copyright ?1998 lucent technologies inc. all rights reserved printed in u.s.a. february 1998 pn98-058tic (replaces pn97-123tic) for additional information, contact your microelectronics group account manager or the following: internet: http://www.lucent.com/micro e-mail: docmaster@micro.lucent.com u.s.a.: microelectronics group, lucent technologies inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18103 1-800-372-2447 , fax 610-712-4106 (in canada: 1-800-553-2448 , fax 610-712-4106) asia pacific: microelectronics group, lucent technologies singapore pte. ltd., 77 science park drive, #03-18 cintech iii, singapore 118256 tel. (65) 778 8833 , fax (65) 777 7495 japan: microelectronics group, lucent technologies japan ltd., 7-18, higashi-gotanda 2-chome, shinagawa-ku, tokyo 141, japan tel. (81) 3 5421 1600 , fax (81) 3 5421 1700 europe: data requests: microelectronics group dataline: tel. (44) 1189 324 299 , fax (44) 1189 328 148 technical inquiries: germany: (49) 89 95086 0 (munich), united kingdom: (44) 1344 865 900 (bracknell), france: (33) 1 41 45 77 00 (paris), sweden: (46) 8 600 7070 (stockholm), finland: (358) 9 4354 2800 (helsinki), italy: (39) 2 6601 1800 (milan), spain: (34) 1 807 1441 (madrid)

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